patch-2.4.1 linux/include/asm-sparc64/pbm.h
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- Lines: 43
- Date:
Mon Jan 22 13:30:21 2001
- Orig file:
v2.4.0/linux/include/asm-sparc64/pbm.h
- Orig date:
Mon Mar 27 10:35:56 2000
diff -u --recursive --new-file v2.4.0/linux/include/asm-sparc64/pbm.h linux/include/asm-sparc64/pbm.h
@@ -1,4 +1,4 @@
-/* $Id: pbm.h,v 1.22 2000/03/25 05:18:30 davem Exp $
+/* $Id: pbm.h,v 1.23 2001/01/11 16:26:45 davem Exp $
* pbm.h: UltraSparc PCI controller software state.
*
* Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com)
@@ -18,11 +18,12 @@
/* The abstraction used here is that there are PCI controllers,
* each with one (Sabre) or two (PSYCHO/SCHIZO) PCI bus modules
- * underneath. Each PCI controller has a single IOMMU shared
- * by the PCI bus modules underneath, and if a streaming buffer
+ * underneath. Each PCI bus module uses an IOMMU (shared by both
+ * PBMs of a controller, or per-PBM), and if a streaming buffer
* is present, each PCI bus module has it's own. (ie. the IOMMU
- * is shared between PBMs, the STC is not) Furthermore, each
- * PCI bus module controls it's own autonomous PCI bus.
+ * might be shared between PBMs, the STC is never shared)
+ * Furthermore, each PCI bus module controls it's own autonomous
+ * PCI bus.
*/
#define PBM_LOGCLUSTERS 3
@@ -150,6 +151,9 @@
/* This PBM's streaming buffer. */
struct pci_strbuf stc;
+ /* IOMMU state, potentially shared by both PBM segments. */
+ struct pci_iommu *iommu;
+
/* Now things for the actual PCI bus probes. */
unsigned int pci_first_busno;
unsigned int pci_last_busno;
@@ -188,9 +192,6 @@
struct pci_ops *pci_ops;
unsigned int pci_first_busno;
unsigned int pci_last_busno;
-
- /* IOMMU state shared by both PBM segments. */
- struct pci_iommu iommu;
void *starfire_cookie;
};
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