patch-2.4.22 linux-2.4.22/arch/sh/kernel/irq_ipr.c

• Lines: 99
• Date: 2003-08-25 04:44:40.000000000 -0700
• Orig file: linux-2.4.21/arch/sh/kernel/irq_ipr.c
• Orig date: 2001-09-08 12:29:09.000000000 -0700

diff -urN linux-2.4.21/arch/sh/kernel/irq_ipr.c linux-2.4.22/arch/sh/kernel/irq_ipr.c
@@ -1,15 +1,16 @@
-/* $Id: irq_ipr.c,v 1.20 2001/07/15 23:26:56 gniibe Exp $
+/* $Id: irq_ipr.c,v 1.1.1.1.2.1 2003/07/16 18:41:20 yoshii Exp $
  *
  * linux/arch/sh/kernel/irq_ipr.c
  *
  * Copyright (C) 1999  Niibe Yutaka & Takeshi Yaegashi
  * Copyright (C) 2000  Kazumoto Kojima
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
  *
  * Interrupt handling for IPR-based IRQ.
  *
  * Supported system:
  *	On-chip supporting modules (TMU, RTC, etc.).
- *	On-chip supporting modules for SH7709/SH7709A/SH7729.
+ *	On-chip supporting modules for SH7300/SH7709/SH7709A/SH7729.
  *	Hitachi SolutionEngine external I/O:
  *		MS7709SE01, MS7709ASE01, and MS7750SE01
  *
@@ -88,7 +89,8 @@
 {
 	disable_ipr_irq(irq);
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
 	/* This is needed when we use edge triggered setting */
 	/* XXX: Is it really needed? */
 	if (IRQ0_IRQ <= irq && irq <= IRQ5_IRQ) {
@@ -196,7 +198,10 @@
 #endif
 
 	make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
+
+#if defined(CONFIG_SH_RTC)
 	make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
+#endif
 
 #ifdef SCI_ERI_IRQ
 	make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
@@ -211,6 +216,10 @@
 	make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
 #endif
 
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+	make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY);
+#endif
+
 #ifdef SCIF_ERI_IRQ
 	make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
 	make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
@@ -225,7 +234,8 @@
 	make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
 #endif
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
 	/*
 	 * Initialize the Interrupt Controller (INTC)
 	 * registers to their power on values
@@ -242,6 +252,7 @@
 	make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY);
 	make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY);
 	make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY);
+#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
 	make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY);
 	make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY);
 	enable_ipr_irq(PINT0_IRQ);
@@ -260,16 +271,19 @@
 		else if(i & 0x40) pint_map[i] = 6;
 		else if(i & 0x80) pint_map[i] = 7;
 	}
-#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */
+#endif
+#endif /* CONFIG_CPU_SUBTYPE_SH7300 || CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */
 
 	/* Perform the machine specific initialisation */
 	if (sh_mv.mv_init_irq != NULL) {
 		sh_mv.mv_init_irq();
 	}
 }
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
 int ipr_irq_demux(int irq)
 {
+#if !defined(CONFIG_CPU_SUBTYPE_SH7300)
 	unsigned long creg, dreg, d, sav;
 
 	if(irq == PINT0_IRQ)
@@ -304,6 +318,7 @@
 		if(d == 0) return irq;
 		return PINT_IRQ_BASE + 8 + pint_map[d];
 	}
+#endif
 	return irq;
 }
 #endif